EDN

2 MBit CMOS Memory FRAM Chip

The MB85R2001 is 2 Mbit Ferroelectric Random Access Memory (FRAM) chip packaged on a 48-pin plastic TSOP and operating at a temperature range of -20°C to +85°C. It has 10 years of data retention and ...
Automation World

Scalable, Printed CMOS Memory Enables Internet of Things

Practically since its founding over eight years ago, Automation World has covered the technology and applications of the connected world, now dubbed the “Internet of Things.” The most recent example ...
EDN

Single electron memory in CMOS

Researchers from Cambridge University's Microelectronics Research Centre and Hitachi Cambridge Laboratory made progress on building a single-electron memory in CMOS. The group has put together a 3 X 3 ...
Electronic Design

CMOS Memory Includes MTP Fuse

The AEFuse embedded, nonvolatile memory cores include what is said to be the first multiple-times-programmable (MTP) fuse fabricated in standard 0.25 µm and 0.18 µm CMOS processes. Offered as a ...
Earth.com

First complete 2D flash chip programs in just 20 nanoseconds

Researchers achieve the first complete 2D flash chip, which can be programmed in 20 nanoseconds with minimal energy ...
Science Daily

Demonstration of high-speed SOT-MRAM memory cell compatible with 300mm Si CMOS technology

Researchers have announced the demonstration of high-speed spin-orbit-torque magnetoresistive random access memory cell compatible with 300 mm Si CMOS technology. Researchers at Tohoku University have ...
Electronic Design

64-MBit Parallel Flash Memory Device Leverages CMOS SuperFlash

A 4M x16 CMOS Advanced Multi-Purpose Flash Plus (Advanced MPF+), dubbed the SST38VF6401B by Microchip, takes advantage of the company’s CMOS SuperFlash technology—a split-gate cell design and ...
Design-Reuse

Kilopass Announces 90nm On-Chip Embedded Non-Volatile Memory IP for SoC Designs Using General Purpose and Low Power Standard Logic CMOS

For the First Time, Applications Requiring High Density Logic NVM on Advanced Semiconductor Processes Have an Embedded NVM Solution SANTA CLARA, CA--Jul 24, 2007-- Kilopass Technology Inc., the ...
Semiconductor Engineering

CMOS-Based HW Topology For Single-Cycle In-Memory XOR/XNOR Operations

A technical paper titled “CMOS-based Single-Cycle In-Memory XOR/XNOR” was published by researchers at University of Tennessee, University of Virginia, and Oak Ridge National Laboratory (ORNL). “Big ...
EurekAlert!

Demonstration of high-speed SOT-MRAM memory cell compatible with 300mm Si CMOS technology

Researchers at Tohoku University have announced the demonstration of high-speed spin-orbit-torque (SOT) magnetoresistive random access memory cell compatible with 300 mm Si CMOS technology. The demand ...